Electrical and Lifetime Model developments for Cryogenics ROIC Design at ISAE-SUPAERO
AYOUB EL ABDI 1 (presenting author), Philippe MARTIN GONTHIER 1, Valentin BADEFORT-BARIL 1
1 Institut supérieur de l'aéronautique et de l'espace, , France
Electrical and Lifetime Model developments for Cryogenics ROIC Design at ISAE-SUPAERO
O. Saint-Péb, V. Carreaub, S. Rizzolob, L. Höglundc, T. Kohlc
a ISAE-SUPAERO, 10 avenue Marc Pélegrin, 31400 Toulouse, France
b Airbus Defence & Space, 31 rue des cosmonautes, 31400 Toulouse, France
c IRnova, Isafjordsgatan 26, 5th fl,SE-164 40 Kista, Sweden
Infrared image sensors are widely used in space applications, playing a crucial role in many fields such as Earth observation, weather monitoring and astronomy. Composed of a PhotoDiode Array, also called PDA (made of MCT, T2SL,…) and a ReadOut Integrated Circuit, ROIC, the Focal Plane Array FPA is operated at cryogenic temperature to improve PDA electro-optical performances. These operation conditions induce two major points for ROIC design. First point concerns the need of electrical models at cryogenic temperatures required to design ROIC with good confidence in electrical simulations (only few foundries develop cryogenic electrical models, not always in agreement with targeted temperatures). Second one is the Hot Carrier Injection (HCI) impact at MOSFET level. Indeed, when carriers gain enough energy, they can be injected into the gate oxide causing degradations on the MOSFET’s electrical performances, glowing or Low Frequency Noise.While being well-known along the standard CMOS temperature range, these impacts are increased at cryogenic temperature but not well modeled.
As part of the Horizon Europe STEP project, our work focuses on the development of SPICE models at various temperatures: 80 K, 140 K, and 190 K. For this purpose, a test structure containing several transistors with different sizes and types was specifically designed on the 180nm technology. The measurement was done at the specified temperatures using a cryo-prober coupled with a Semiconductor Characterization System (Keithley SCS4200) via triaxial cables for low level measurements. Consequently, a series of SPICE models (BSIM4.8) has been developed using Model Parameter Builder (MPB) tool. The measurement and extraction methodologies were developed by the CIMI research group to optimize the SPICE models, specifically addressing the challenges posed by long measurements causing thermomechanical stress at cryogenic temperatures.
Concerning the exploration on the HCI, we focus essentially on Hot Carrier Degradation (HCD). The aim is to develop empirical models to estimate the devices lifetime as a function of their geometries and of the operating temperature. HCI measurement was done on standard N-MOSFET 3v3 with same setup mentioned above, using a test structure more suitable, designed on the targeted 180nm technology. Empirical models have been developed for different MOSFET’s characteristics degradation in different operating regions (Gm, Vth, Idsat…) by applying the standard JESD28-A from JEDEC.
The results of this work is supporting the design ROICs with a good confidence in electrical simulations and lifetime degradation and help to determine degradation acceleration factors to qualify the ROIC for required environmental and lifetime conditions.
Ayoub EL ABDI: ayoub.el-abdi@isae-supaero.fr (+33 7 51 23 70 40)
ISAE-SUPAERO, 10 avenue Marc Pélegrin, 31400 Toulouse, France